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HEF4894B
12-stage shift-and-store register LED driver
Rev. 7 -- 13 August 2010 Product data sheet
1. General description
The HEF4894B is a 12-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input (D) to the parallel LED driver outputs (QP0 to QP11). Data is shifted on positive-going clock (CP) transitions. The data in each shift register stage is transferred to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at the output whenever the output enable (OE) input signal is HIGH. Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4894B devices. Serial data is available at QS1 on positive-going clock edges to allow high-speed operation in cascaded systems with a fast clock rise time. The same serial data is available at QS2 on the next negative going clock edge. This is used for cascading HEF4894B devices when the clock has a slow rise time. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. It is also suitable for use over both the industrial (-40 C to +85 C) and automotive (-40 C to +125 C) temperature ranges.
2. Features and benefits
Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Operates across the automotive temperature range from -40 C to +125 C Complies with JEDEC standard JESD 13-B
3. Applications
Automotive and industrial
4. Ordering information
Table 1. Ordering information All types operate from -40 C to +125 C. Type number HEF4894BP HEF4894BT HEF4894BTT Package Name DIP20 SO20 TSSOP20 Description plastic dual in-line package; 20 leads (300 mil) plastic small outline package; 20 leads; body width 7.5 mm plastic thin shrink small outline package; 20 leads; body width 4.4 mm Version SOT146-1 SOT163-1 SOT360-1
NXP Semiconductors
HEF4894B
12-stage shift-and-store register LED driver
5. Functional diagram
3 CP 1 STR QS1 QS2 QP0 QP1 QP2 2 D QP3 QP4 QP5 QP6 QP7 QP8 QP9 QP10 QP11 OE 19 7 8 9 18 17 16 15 14 13 11 12 4 5 6
001aai639
Fig 1.
Logic Symbol
2 3 12-STAGE SHIFT REGISTER 12 11 STR 1 12-BIT STORAGE REGISTER QS2 QS1
D CP
OE
19 4 QP0 QP1 5 6 QP2 QP3 7
OPEN-DRAIN OUTPUTS 8 QP4 QP5 9 18 QP6 QP7 17 16 QP8 QP9 15 14 QP10 QP11 001aag118 13
Fig 2.
Functional diagram
HEF4894B
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Product data sheet
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HEF4894B
12-stage shift-and-store register LED driver
STAGE 0 D D FF0 CP CP Q
STAGE 1 TO 10 D Q10S
STAGE 11 D Q FF11 CP D Q
QS1
QS2
LATCH LE
D
Q
D
Q
LATCH LE STR
LATCH LE
OE
QP0 QP1
QP10
QP11
001aag119
Fig 3.
Logic diagram
6. Pinning information
6.1 Pinning
STR D CP QP0 QP1 QP2 QP3 QP4 QP5
1 2 3 4 5
20 VDD 19 OE 18 QP6 17 QP7 16 QP8
HEF4894B
6 7 8 9 15 QP9 14 QP10 13 QP11 12 QS2 11 QS1
001aag117
VSS 10
Fig 4.
Pin configuration
HEF4894B
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12-stage shift-and-store register LED driver
6.2 Pin description
Table 2. Symbol D QP0 to QP11 QS1 QS2 CP STR OE VDD VSS Pin description Pin 2 4, 5, 6, 7, 8, 9, 18, 17, 16, 15, 14, 13 11 12 3 1 19 20 10 Description serial input parallel output serial output serial output clock input strobe input output enable input supply voltage ground (0 V)
7. Functional description
Table 3. Function table[1] At the positive clock edge the information in the 10th register stage is transferred to the 11th register stage and the QS output Control CP
[1] [2] [3]
Input OE L L H H H H STR X X L H H H D X X X L H H
Parallel output QP0 Z Z no change Z L no change QPn Z Z no change QPn - 1 QPn - 1 no change
Serial output QS1[2] Q10S no change Q10S Q10S Q10S no change QS2[3] no change Q11S no change no change no change Q11S
H = HIGH voltage level; L = LOW voltage level; X = don't care; = LOW-to-HIGH clock transition; = HIGH-to-LOW clock transition; Z = high-impedance OFF-state. Q10S = the data in register stage 10 before the LOW to HIGH clock transition. Q11S = the data in register stage 11 before the HIGH to LOW clock transition.
HEF4894B
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HEF4894B
12-stage shift-and-store register LED driver
clock input
data input
strobe input output enable input internal Q0S (FF 1) QP0 output internal Q10S (FF 11) QP10 output serial QS1 output serial QS2 output
001aag121
Fig 5.
Timing diagram
8. Limiting values
Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDD IIK VI IOK Parameter supply voltage input clamping current input voltage output clamping current QSn outputs; VO < -0.5 V or VO > VDD + 0.5 V QPn outputs; VO < 0.5 V II IO Tstg Tamb Ptot input leakage current output current storage temperature ambient temperature total power dissipation Tamb = -40 C to +125 C DIP20 package SO20 package TSSOP20 package P
[1] [2] [3]
[1] [2] [3]
Conditions VI < -0.5 V or VI > VDD + 0.5 V
Min -0.5 -0.5 -65 -40 -
Max +18 10 VDD + 0.5 10 40 10 10 40 +150 +125 750 500 500 100
Unit V mA V mA mA mA mA mA C C mW mW mW mW
QSn outputs QPn outputs
power dissipation
per output
For DIP20 package: Ptot derates linearly with 12 mW/K above 70 C. For SO20 package: Ptot derates linearly with 8 mW/K above 70 C. For TSSOP20 package: Ptot derates linearly with 5.5 mW/K above 60 C.
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HEF4894B
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12-stage shift-and-store register LED driver
9. Recommended operating conditions
Table 5. Symbol VDD VI Tamb t/V Recommended operating conditions Parameter supply voltage input voltage ambient temperature input transition rise and fall rate in free air VDD = 5 V VDD = 10 V VDD = 15 V Conditions Min 3 0 -40 Typ Max 15 VDD +125 3.75 0.5 0.08 Unit V V C s/V s/V s/V
10. Static characteristics
Table 6. Static characteristics VSS = 0 V; VI = VSS or VDD; unless otherwise specified. Symbol Parameter VIH HIGH-level input voltage Conditions |IO| < 1 A VDD 5V 10 V 15 V VIL LOW-level input voltage |IO| < 1 A 5V 10 V 15 V VOH HIGH-level output voltage QSn outputs; |IO| < 1 A 5V 10 V 15 V VOL LOW-level output voltage QSn outputs; |IO| < 1 A 5V 10 V 15 V QPn outputs; |IO| < 20 mA 5V 10 V 15 V IOH HIGH-level output current QSn outputs VO = 2.5 V VO = 4.6 V VO = 9.5 V IOL LOW-level output current QSn outputs VO = 0.4 V VO = 0.5 V VO = 1.5 V II input leakage current 5V 10 V 15 V 15 V 0.64 1.6 4.2 0.1 0.5 1.3 3.2 0.1 0.36 0.9 2.4 1.0 0.36 0.9 2.4 1.0 mA mA mA A 5V 5V 10 V -1.7 -0.64 -1.6 -4.2 -1.4 -0.5 -1.3 -3.4 -1.1 -0.36 -0.9 -2.4 -1.1 -0.36 -0.9 -2.4 mA mA mA mA Tamb = -40 C Tamb = +25 C Tamb = +85 C Tamb = +125 C Unit Min 3.5 7.0 11.0 4.95 9.95 14.95 Max 1.5 3.0 4.0 0.05 0.05 0.05 0.75 0.75 0.75 Min 3.5 7.0 11.0 4.95 9.95 14.95 Max 1.5 3.0 4.0 0.05 0.05 0.05 0.75 0.75 0.75 Min 3.5 7.0 11.0 4.95 9.95 14.95 Max 1.5 3.0 4.0 0.05 0.05 0.05 1.5 1.5 1.5 Min 3.5 7.0 11.0 4.95 9.95 14.95 Max 1.5 3.0 4.0 0.05 0.05 0.05 1.5 1.5 1.5 V V V V V V V V V V V V V V V
VO = 13.5 V 15 V
HEF4894B
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Table 6. Static characteristics ...continued VSS = 0 V; VI = VSS or VDD; unless otherwise specified. Symbol Parameter IOZ OFF-state output current Conditions QPn output is HIGH; VO = 15 V IO = 0 A VDD 5V 10 V 15 V 5V 10 V 15 V CI input capacitance Tamb = -40 C Tamb = +25 C Tamb = +85 C Tamb = +125 C Unit Min Max 2 2 2 5 10 20 Min Max 2 2 2 5 10 20 7.5 Min Max 15 15 15 150 300 600 Min Max 15 15 15 150 300 600 A A A A A A pF
IDD
supply current
11. Dynamic characteristics
Table 7. Dynamic characteristics VSS = 0 V; Tamb = 25 C unless otherwise specified. For test circuit see Figure 10. Symbol Parameter tPHL HIGH to LOW propagation delay Conditions CP to QS1; see Figure 6 VDD 5V 10 V 15 V CP to QS2; see Figure 6 5V 10 V 15 V tPLH LOW to HIGH propagation delay CP to QS1; see Figure 6 5V 10 V 15 V CP to QS2; see Figure 6 5V 10 V 15 V tPZL OFF-state to LOW propagation delay CP to QPn; see Figure 6 5V 10 V 15 V STR to QPn; see Figure 7 5V 10 V 15 V tPLZ LOW to OFF-state propagation delay CP to QPn; see Figure 6 and 7 5V 10 V 15 V STR to QPn; see Figure 7 5V 10 V 15 V
[1] [1]
Extrapolation formula 132 ns + (0.55 ns/pF)CL 53 ns + (0.23 ns/pF)CL 37 ns + (0.16 ns/pF)CL 92 ns + (0.55 ns/pF)CL 39 ns + (0.23 ns/pF)CL 32 ns + (0.16 ns/pF)CL 102 ns + (0.55 ns/pF)CL 44 ns + (0.23 ns/pF)CL 32 ns + (0.16 ns/pF)CL 102 ns + (0.55 ns/pF)CL 49 ns + (0.23 ns/pF)CL 37 ns + (0.16 ns/pF)CL
Min -
Typ 160 65 45 120 50 40 130 55 40 130 60 45 240 80 55 140 70 55 170 75 60 100 40 35
Max 320 130 90 240 100 80 260 110 80 260 120 90 480 160 110 280 140 110 340 150 120 200 100 70
Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
HEF4894B
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HEF4894B
12-stage shift-and-store register LED driver
Table 7. Dynamic characteristics ...continued VSS = 0 V; Tamb = 25 C unless otherwise specified. For test circuit see Figure 10. Symbol Parameter ten Conditions OE to QPn; see Figure 8 VDD 5V 10 V 15 V tdis OE to QPn; see Figure 8 5V 10 V 15 V tt transition time QS1, QS2; see Figure 6 5V 10 V 15 V tW pulse width CP; LOW and HIGH; 5 V see Figure 6 10 V 15 V STR; HIGH; see Figure 7 5V 10 V 15 V tsu set-up time D to CP; see Figure 9 5V 10 V 15 V th hold time D to CP; see Figure 9 5V 10 V 15 V fclk(max) maximum clock frequency CP; see Figure 6 5V 10 V 15 V
[1] [2] [3]
[1][3] [2] [2]
Extrapolation formula
Min -
Typ 100 55 50 80 40 30 85 40 30 30 15 12 40 30 12 30 10 5 -15 5 5 10 22 28
Max 200 110 100 160 80 60 170 80 60 -
Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns MHz MHz MHz
35 ns + (1.00 ns/pF)CL 19 ns + (0.42 ns/pF)CL 16 ns + (0.28 ns/pF)CL
60 30 24 80 60 24 60 20 15 +5 20 20 5 11 14
The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). ten is the same as tPZL and tdis is the same as tPLZ. tt is the same as tTLH and tTHL.
Table 8. Dynamic power dissipation PD can be calculated from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C. Symbol Parameter PD dynamic power dissipation VDD 5V 10 V 15 V Typical formula PD = 1200 x fi + (fo x CL) x VDD W
2 2
Where fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; (fo x CL) = sum of the outputs; VDD = supply voltage in V.
PD = 5550 x fi + (fo x CL) x VDD W PD = 15000 x fi + (fo x CL) x VDD2 W
HEF4894B
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12-stage shift-and-store register LED driver
12. Waveforms
1/fclk(max) VI CP input VSS tW tPLZ VDD tW tPZL VY VX tPLH VOH QS1 output VOL 90 % VM 10 % tTLH tPLH VOH QS2 output VOL 90 % VM 10 % tTLH tTHL
001aag222
VM
QPn output
VOL
tPHL
tTHL tPHL
Parallel output measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load.
Fig 6.
Propagation delay clock (CP) to output (QPn, QS1, QS2), clock pulse width and maximum clock frequency Measurement points Input VM 0.5VDD Output VM 0.5VDD VX 0.1VO VY 0.9VO
Table 9. Supply VDD 5 V to 15 V
VI CP input VSS VI STR input VSS VDD QPn output VOL VX
001aag802
VM
VM tW tPLZ
tPZL VY
Measurement points are given in Table 9. VOL is the typical output voltage level that occurs with the output load.
Fig 7.
HEF4894B
Strobe (STR) to output (QPn) propagation delays and the strobe pulse width
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HEF4894B
12-stage shift-and-store register LED driver
VI OE input VSS tPLZ VDD output LOW to OFF-state OFF-state to LOW VOL outputs enabled tPZL VY VX outputs disabled outputs enabled
001aag803
VM
Measurement points are given in Table 9. VOL is the typical output voltage level that occurs with the output load.
Fig 8.
Enable and disable times for input OE
VI CP input VSS VI D input VSS VDD QPn output VOL
001aag805
VM tsu th tsu th
VM
Measurement points are given in Table 9. VOL is a typical output voltage level that occurs with the output load. The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig 9.
Set-up and hold times for the data input (D)
HEF4894B
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12-stage shift-and-store register LED driver
VI input pulse VSS 10 % tr
90 %
tf VEXT VDD
RL
G
VI DUT
RT
VO
CL 001aag804
Test data is given in Table 10. Definitions for test circuit: DUT - Device Under Test; RL = Load resistance; CL = load capacitance; RT = Termination resistance should be equal to output impedance of Zo of the pulse generator; VEXT = External voltage for measuring switching times.
Fig 10. Test circuit for measuring switching times Table 10. Supply VDD 5 V to 15 V Test data Input VI VDD tr, tf 20 ns VEXT tPLZ, tPZL VDD tPLH, tPHL open Load CL 50 pF RL 1 k
HEF4894B
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13. Application information
Application example: serial-to-parallel data converting LED driver.
VDD VDD
QP0 QP1 VDD D PWM dimmer input OE STR
QP10 QP11
HEF4894B
CP
QP0 QP1 VDD D OE STR
QP10 QP11 QS2
QS2 VSS
HEF4894B
CP VSS
CONTROL AND SYNC CIRCUITRY
DATA
CLOCK
from remote processor
001aag122
Fig 11. Serial-to-parallel converting LED drivers
HEF4894B
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14. Package outline
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 20 11 MH wM (e 1)
pin 1 index E
1
10
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.02 A2 max. 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D
(1)
E
(1)
e 2.54 0.1
e1 7.62 0.3
L 3.60 3.05 0.14 0.12
ME 8.25 7.80 0.32 0.31
MH 10.0 8.3 0.39 0.33
w 0.254 0.01
Z (1) max. 2 0.078
26.92 26.54 1.060 1.045
6.40 6.22 0.25 0.24
Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT146-1 REFERENCES IEC JEDEC MS-001 JEITA SC-603 EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-13
Fig 12. Package outline SOT146-1 (DIP20)
HEF4894B All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2010. All rights reserved.
Product data sheet
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HEF4894B
12-stage shift-and-store register LED driver
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A X
c y HE vMA
Z 20 11
Q A2 A1 pin 1 index Lp L 1 e bp 10 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.1 A1 0.3 0.1 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 13.0 12.6 0.51 0.49 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.05 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 Z
(1)
8o o 0
0.9 0.4
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.055 0.394 0.016
0.035 0.004 0.016
Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT163-1 REFERENCES IEC 075E04 JEDEC MS-013 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-19
Fig 13. Package outline SOT163-1 (SO20)
HEF4894B All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2010. All rights reserved.
Product data sheet
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HEF4894B
12-stage shift-and-store register LED driver
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
D
E
A
X
c y HE vMA
Z
20
11
Q A2 pin 1 index A1 (A 3) A
Lp L
1
e bp
10
wM detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 6.6 6.4 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.5 0.2 8 o 0
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19
Fig 14. Package outline SOT360-1 (TSSOP20)
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12-stage shift-and-store register LED driver
15. Revision history
Table 11. Revision history Release date 20100813 Data sheet status Product data sheet Product data sheet Product data sheet Product data sheet Product specification Product specification Change notice Supersedes HEF4894B v.6 HEF4894B v.5 HEF4894B v.4 HEF4894B_CNV v.3 HEF4894B_CNV v.2 Document ID HEF4894B v.7 Modifications: HEF4894B v.6 HEF4894B v.5 HEF4894B v.4 HEF4894B_CNV v.3 HEF4894B_CNV v.2
*
Section 8 "Limiting values" Added "per output" in the conditions for the power dissipation.
20100408 20091222 20080827 19950101 19950101
HEF4894B
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16. Legal information
16.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
16.3 Disclaimers
Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications -- This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be
HEF4894B
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 7 -- 13 August 2010
17 of 19
NXP Semiconductors
HEF4894B
12-stage shift-and-store register LED driver
Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
HEF4894B
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 7 -- 13 August 2010
18 of 19
NXP Semiconductors
HEF4894B
12-stage shift-and-store register LED driver
18. Contents
1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Application information. . . . . . . . . . . . . . . . . . 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 17 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Contact information. . . . . . . . . . . . . . . . . . . . . 18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 13 August 2010 Document identifier: HEF4894B

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